BSIMPD: a partial-depletion SOI MOSFET model for deep-submicron CMOS designs

Author

Su, Pin ; Fung, Samuel K H ; Tang, Stephen ; Assaderaghi, Fariborz ; Hu, Chenming

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA

fYear

2000

fDate

2000

Firstpage

197

Lastpage

200

Abstract

BSIMPD, a physics-based SPICE model, is developed for bridging deep-submicron CMOS designs using partially-depleted SOI technologies. Formulated on top of the industry-standard bulk-MOSFET model BSIM3v3 for a sound base of scalability and robustness, BSIMPD captures SOI-specific dynamic behaviors with its built-in floating-body, self-heating and body-contact models. A parameter-extraction strategy is demonstrated, and the simulation efficiency is studied. The model has been tested extensively within IBM on state-of-the-art high speed SOI technologies. It has been implemented in many circuit simulators

Keywords

MOSFET; circuit simulation; equivalent circuits; integrated circuit design; integrated circuit modelling; semiconductor device models; silicon-on-insulator; BSIMPD; SOI MOSFET model; body-contact model; circuit simulator implementation; deep-submicron CMOS design; floating-body model; parameter-extraction strategy; partial-depletion SOI MOSFET; physics-based SPICE model; self-heating model; simulation efficiency; CMOS technology; Circuit simulation; Integrated circuit modeling; Isolation technology; MOSFET circuits; Performance gain; Quantum capacitance; SPICE; Semiconductor device modeling; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 2000. CICC. Proceedings of the IEEE 2000

Conference_Location

Orlando, FL

Print_ISBN

0-7803-5809-0

Type

conf

DOI

10.1109/CICC.2000.852647

Filename

852647