Title :
Fault-tolerant graphs for tori
Author :
Yamada, Toshinori ; Ueno, Shuichi
Author_Institution :
Dept. of Electr. & Electron. Eng., Tokyo Inst. of Technol., Japan
Abstract :
Motivated by the design of fault-tolerant multiprocessor interconnection networks, this paper considers the following problem: Given a positive integer t and a graph H, construct a graph C from H by adding a minimum number Δ(t,H) of edges such that even after deleting any t edges from G the remaining graph contains H as a subgraph. We estimate Δ(t,H) for the torus, which is well-known as a very important interconnection network for multiprocessor systems
Keywords :
fault tolerant computing; graph theory; multiprocessor interconnection networks; fault-tolerant; multiprocessor interconnection networks; subgraph; tori; torus; Fault tolerance; Fault tolerant systems; Hypercubes; Linear code; Multiprocessing systems; Multiprocessor interconnection networks; Upper bound;
Conference_Titel :
Parallel Architectures, Algorithms, and Networks, 1996. Proceedings., Second International Symposium on
Conference_Location :
Beijing
Print_ISBN :
0-8186-7460-1
DOI :
10.1109/ISPAN.1996.509018
