Dynamic current mode logic (DyCML), a new low-power high-performance logic family

Author

Allam, M.W. ; Elmasry, M.I.

Author_Institution

Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada

fYear

2000

fDate

2000

Firstpage

421

Lastpage

424

Abstract

This paper presents a new logic style DyCML for low-power high-performance VLSI applications. The new logic family combines the speed, low supply voltage and noise immunity advantages of MCML circuits while achieving the low standby current and design simplicity features of dynamic circuits. Simulation results show that DyCML circuits are superior to CMOS and DCVS logic styles in terms of power and delay. A 16 bit DyCML Carry Look Ahead Adder (CLA) fabricated in 0.6 μm achieves a delay of 1.1 ns while dissipating 21.2 mW at 400 MHz

Keywords

MOS logic circuits; VLSI; adders; current-mode logic; high-speed integrated circuits; logic design; logic gates; low-power electronics; 0.6 micron; 1.1 ns; 21.2 mW; 400 MHz; VLSI applications; carry look ahead adder; dynamic current mode logic; high-performance logic family; logic style; low standby current; low supply voltage; low-power logic family; noise immunity; CMOS logic circuits; Circuit noise; Costs; Delay; Logic circuits; Power dissipation; Resistors; Switching circuits; Very large scale integration; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 2000. CICC. Proceedings of the IEEE 2000

Conference_Location

Orlando, FL

Print_ISBN

0-7803-5809-0

Type

conf

DOI

10.1109/CICC.2000.852699

Filename

852699