• DocumentCode
    2159699
  • Title

    Distributed control synthesis for data-dependent iterative algorithms

  • Author

    Jung, Bongjin ; Jeong, Yongjin ; Burleson, Wayne P.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Massachusetts Univ., Amherst, MA, USA
  • fYear
    1994
  • fDate
    22-24 Aug 1994
  • Firstpage
    57
  • Lastpage
    68
  • Abstract
    Data-dependent control flow changes are typically implemented in complex general-purpose controllers. However, in medium to fine-grained iterative algorithms found in DSP and arithmetic, it is desirable for both cost and performance reasons to develop simplified and distributed control structures throughout the array architectures. We present a transformation technique to systematically convert an iterative algorithm whose loop bounds are data-dependent to an equivalent data-independent regular algorithm. We use the worst-case situation to define the structure of a given computation. Then, depending upon applications, various optimizations are performed to minimize cost overhead associated with data-dependent characteristics. To demonstrate the feasibility of our methodologies, we have designed and simulated parallel algorithms for two important applications using the proposed transformation. Based on the resulting algorithms, we have developed VLSI array architectures using conventional methods of regular array synthesis (S.Y. Kung, 1988). Compared with previously reported structures, we have achieved substantial improvements in terms of both performance and array costs
  • Keywords
    VLSI; circuit analysis computing; distributed control; iterative methods; network synthesis; parallel algorithms; systolic arrays; DSP; VLSI array architectures; array architectures; complex general-purpose controllers; cost overhead; data-dependent control flow changes; data-dependent iterative algorithms; distributed control structures; distributed control synthesis; equivalent data-independent regular algorithm; fine-grained iterative algorithms; loop bounds; parallel algorithms; performance reasons; regular array synthesis; transformation technique; worst-case situation; Algorithm design and analysis; Arithmetic; Computational modeling; Computer architecture; Cost function; Design methodology; Digital signal processing; Distributed control; Iterative algorithms; Parallel algorithms;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Application Specific Array Processors, 1994. Proceedings. International Conference on
  • Conference_Location
    San Francisco, CA
  • ISSN
    1063-6862
  • Print_ISBN
    0-8186-6517-3
  • Type

    conf

  • DOI
    10.1109/ASAP.1994.331816
  • Filename
    331816