Title :
OK, if these CAD tools are so great, why isn´t my chip design on schedule?
Author_Institution :
TLW Inc., Burlington, MA, USA
Abstract :
This paper summarizes some of the problems facing designers of leading edge CMOS ICs in the 1990s. The author examines the current state of VLSI electronic design automation relating to the design of large, high speed or low power, digital CMOS chips. He provides some pointers to future directions for CAD research and possible ways of approaching these problems in the business and academic environments of today
Keywords :
CMOS integrated circuits; VLSI; circuit CAD; CAD tools; CMOS ICs; VLSI electronic design automation; chip design; Chip scale packaging; Computer displays; Design automation; Electronic design automation and methodology; Integrated circuit layout; Job shop scheduling; Operational amplifiers; Processor scheduling; Teleprinting; Very large scale integration;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1994. ICCD '94. Proceedings., IEEE International Conference on
Conference_Location :
Cambridge, MA
Print_ISBN :
0-8186-6565-3
DOI :
10.1109/ICCD.1994.331840
