• DocumentCode
    2160429
  • Title

    FLOVA: A four-issue VLIW geometry processor with SIMD instructions and lighting acceleration unit

  • Author

    Nam, Sang-Joon ; Kim, Byoung-Woon ; Im, Yeon-Ho ; Kwon, Young-Su ; Lee, Jun-Hee ; Cheon, Young-Wook ; Byun, Sung-Jae ; Lee, Dae-Hyun ; Kyung, Chong-Min

  • Author_Institution
    Korea Adv. Inst. of Sci. & Technol., South Korea
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    551
  • Lastpage
    554
  • Abstract
    This paper describes a VLIW (very long instruction word) geometry processor called FLOVA (FLOating-Point VLIW Architecture) which was developed to accelerate the geometry stage of 3D graphics. FLOVA executes four instructions in one cycle and supports 136 instructions including 35 SIMD (single instruction multiple data) instructions to accelerate the geometry stage. Special features to accelerate transformation and lighting operations in 3D graphics geometry stage are described. FLOVA can calculate the power value of two floating-point numbers in only four clock cycles with a negligible loss of accuracy, compared to over 150 clock cycles in other processors
  • Keywords
    computer graphic equipment; floating point arithmetic; microprocessor chips; parallel architectures; 3D graphics; FLOVA; SIMD instructions; clock cycles; floating-point numbers; four-issue VLIW geometry processor; lighting acceleration unit; transformation operations; Acceleration; Clocks; Computer graphics; Engines; Geometry; Multimedia computing; Speech processing; Telephony; VLIW; Video compression;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Custom Integrated Circuits Conference, 2000. CICC. Proceedings of the IEEE 2000
  • Conference_Location
    Orlando, FL
  • Print_ISBN
    0-7803-5809-0
  • Type

    conf

  • DOI
    10.1109/CICC.2000.852728
  • Filename
    852728