• DocumentCode
    2160741
  • Title

    Conflict-free parallel access scheme for mixed-radix FFT supporting I/O permutations

  • Author

    Sorokin, Harri ; Takala, Jarmo

  • Author_Institution
    Tampere Univ. of Technol., Tampere, Finland
  • fYear
    2011
  • fDate
    22-27 May 2011
  • Firstpage
    1709
  • Lastpage
    1712
  • Abstract
    FFT algorithms are inherently highly parallel and often require frequent access to memory indicating need for high memory bandwidth. Unfortunately, in-place FFT algorithms access data in specific data patterns, thus conflict-free parallel access calls for specialized access schemes. In this paper, we propose a conflict-free parallel access scheme for mixed-radix FFT computations, which supports not only the kernel computations but also I/O permutations of the FFT. The scheme supports all the sequence sizes of power-of-two and all the power-of-two numbers of memory modules. The implementation of the address generation unit is simple requiring only XOR gates and hardwiring.
  • Keywords
    digital arithmetic; digital signal processing chips; fast Fourier transforms; information retrieval; logic gates; parallel memories; I/O permutation; XOR gate; address generation unit; conflict-free parallel access calls; fast Fourier transform; high memory bandwidth; memory module; mixed-radix FFT algorithm; power-of-two number; Generators; Indexes; Logic gates; Memory management; Program processors; Signal processing algorithms; Transforms; application-specific integrated circuits; digital signal processing chips; memory architecture;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Acoustics, Speech and Signal Processing (ICASSP), 2011 IEEE International Conference on
  • Conference_Location
    Prague
  • ISSN
    1520-6149
  • Print_ISBN
    978-1-4577-0538-0
  • Electronic_ISBN
    1520-6149
  • Type

    conf

  • DOI
    10.1109/ICASSP.2011.5946830
  • Filename
    5946830