Two-phase logic design by hardware flowcharts

Two-phase logic design is a technique that has long been used in the IC industry to increase data throughput and improve silicon efficiency. The approach to this technique has often been adhoc due to its departure from the formal techniques of edge-triggered design taught in universities. This paper presents a formal and structured approach to two-phase logic design that we have been successfully using in the design of embedded controllers at National Semiconductor since 1990. It is both rigorous and fully compatible with HSIS, a formal verification tool from UC Berkeley