Optimization of modular reduction procedure in RSA algorithm implementation on assembler of TMS320C54x signal processors

Author

Doroeviae, G. ; Unkasevia, T. ; Markoviae, M.

Author_Institution

Mil. Tech. Acad., Belgrade, Serbia

Volume

2

fYear

2002

fDate

2002

Firstpage

811

Abstract

Possible optimization techniques for the modular reduction procedure of RSA algorithm realization on assembler of Texas Instruments TMS320C54x family of signal processors are considered. Besides a standard dividing algorithm with a remainder, a reciprocal value method and Montgomery\´s procedure are considered. Obtained results show that the best results are obtained by using Montgomery\´s approach for modular reduction in the RSA algorithm and also show that the TMS320C54x family of signal processors is suitable for the RSA algorithm realization. Therefore, they are proposed for realization of some coprocessor module in computer networks with "client-server" architecture requiring public-key cryptographic applications.

Keywords

client-server systems; coprocessors; digital signal processing chips; optimisation; program assemblers; public key cryptography; Montgomery´s procedure; RSA algorithm implementation; TMS320C54x signal processors; assembler; client-server architecture; computer networks; coprocessor module; modular reduction procedure; optimization; public-key cryptographic applications; reciprocal value method; standard dividing algorithm; Assembly; Computer architecture; Computer networks; Coprocessors; Digital signatures; Mathematics; Public key; Public key cryptography; Signal processing; Signal processing algorithms;

fLanguage

English

Publisher

ieee

Conference_Titel

Digital Signal Processing, 2002. DSP 2002. 2002 14th International Conference on

Print_ISBN

0-7803-7503-3

Type

conf

DOI

10.1109/ICDSP.2002.1028214

Filename

1028214