Design of high-speed residue-to-binary number system converter based on Chinese Remainder Theorem

The carry-free nature of the residue number system (RNS) has made it attractive for implementing a variety of specialized high-performance digital signal processing systems. A new implementation of a high-speed residue-to-binary converter based on the Chinese Remainder Theorem (CRT) is proposed. It employs a new r-operand adder modulo M, realized using carry-save adders and its delay path involves only one addition of two a-bit operands performed by some carry-propagate adder, where M is the dynamic range and a=[log₂ M]. The latter feature is in contrast with any other CRT-based converter that has been proposed to date, which require two subsequent additions of a-bit operands. This circuit offers a latency period significantly smaller than the fastest known designs