DocumentCode
2163304
Title
A competent design of 2∶1 multiplexer and its application in 1-bit full adder cell
Author
Dubey, Anamika ; Dubey, Souvik ; Akashe, Shyam
Author_Institution
ITM Univ., Gwalior, India
fYear
2013
fDate
22-23 Feb. 2013
Firstpage
1519
Lastpage
1523
Abstract
It is a combinational logic circuit, it is used in application in which data must be switched from multiple source to a destination as unidirectional device. it represent the simulation of different 2:1 its comperative analysis on different parameter such as power supply voltage, operating A multiplexer is known as mux. It is a device that helps in selection a number of input signals, frequency temperature and area efficiency and its applications in 1bit full adder cell all the simulation have been followed on cadence tool at 180nm technology at virtuoso.
Keywords
CMOS logic circuits; adders; logic design; multiplexing equipment; 1-bit full adder cell; cadence tool; combinational logic circuit; multiplexer design; power supply voltage; size 180 nm; Adders; CMOS integrated circuits; Delays; Frequency division multiplexing; MOS devices; Very large scale integration; 2∶1 multiplexer; CMOS LOGIC; Low power; full adder and VLSI; power delay product and speed;
fLanguage
English
Publisher
ieee
Conference_Titel
Advance Computing Conference (IACC), 2013 IEEE 3rd International
Conference_Location
Ghaziabad
Print_ISBN
978-1-4673-4527-9
Type
conf
DOI
10.1109/IAdCC.2013.6514452
Filename
6514452
Link To Document