Challenges of Low Effective-K approaches for future Cu interconnect

Author

Bao, T.I. ; Chen, H.C. ; Lee, C.J. ; Lu, H.H. ; Chen, H.W. ; Tsai, H.Y. ; Lin, C.C. ; Jeng, S.P. ; Shue, S.L. ; Yu, C.H.

Author_Institution

Taiwan Semicond. Manuf. Co., Hsinchu

fYear

2009

fDate

1-3 June 2009

Firstpage

17

Lastpage

20

Abstract

Challenges of various low effective-K approaches, including homogeneous low-K and air-gap, for next generation Cu/low-K interconnect will be presented. For homogeneous low-K approach, top issues and possible solutions for K damage, package, and CMP peeling & planarization due to introduction of fragile lower k (KLt2.4) insulator will be focused. For air-gap, various types of air-gaps will be reviewed from the points of cost, layout/designer, and new processes involved.

Keywords

air gaps; chemical mechanical polishing; copper; integrated circuit interconnections; integrated circuit packaging; low-k dielectric thin films; CMP peeling; Cu; Cu interconnect; air gap; homogeneous low-k method; low-k damage; ow-k interconnect; package; planarization; Air gaps; Capacitance; Costs; Curing; Dielectric materials; Electronic mail; Etching; Insulation; Packaging; Semiconductor device manufacture;

fLanguage

English

Publisher

ieee

Conference_Titel

Interconnect Technology Conference, 2009. IITC 2009. IEEE International

Conference_Location

Sapporo, Hokkaido

Print_ISBN

978-1-4244-4492-2

Electronic_ISBN

978-1-4244-4493-9

Type

conf

DOI

10.1109/IITC.2009.5090329

Filename

5090329