DocumentCode
2163679
Title
Back-end-of-line integration approaches for resistive memories
Author
Jousseaume, V. ; Buckley, J. ; Bernard, Y. ; Gonon, P. ; Vallée, C. ; Mougenot, M. ; Feldis, H. ; Minoret, S. ; Chamiot-Maitral, G. ; Persico, A. ; Zenasni, A. ; Gely, M. ; Barnes, J.P. ; Martinez, E. ; Grampeix, H. ; Guedj, C. ; Nodin, J.F. ; Salvo, B. D
Author_Institution
CEA-LETI-Minatec, Grenoble
fYear
2009
fDate
1-3 June 2009
Firstpage
41
Lastpage
43
Abstract
This work deals with the development of resistive memories based on oxides and their integration into the interconnection levels. The paper is focused on the screening of different dielectric oxides (metallic or not) showing resistive switching properties in order to lead to the highest performance resistive memories. Nickel oxide which is the most studied material in the literature is compared to other binary metallic oxides. In parallel, cells with silicon based dielectrics and Cu electrodes were developed. Electrical results allowed a comparison between the 3 main mechanisms observed in resistive memories based on oxides. Moreover, a specific resist flowing process and ion beam etching were optimized in order to limit metallic residues on memory cell side walls and prevent short-circuiting.
Keywords
interconnections; nickel compounds; random-access storage; switching circuits; NiO; back-end-of-line integration; dielectric oxides; interconnection levels; ion beam etching; nickel oxide; resistive memories; resistive switching properties; specific resist flowing process; Dielectric materials; Electrodes; Etching; Inorganic materials; Ion beams; Lead compounds; Nickel; Resists; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Interconnect Technology Conference, 2009. IITC 2009. IEEE International
Conference_Location
Sapporo, Hokkaido
Print_ISBN
978-1-4244-4492-2
Electronic_ISBN
978-1-4244-4493-9
Type
conf
DOI
10.1109/IITC.2009.5090335
Filename
5090335
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