Data-driven self-timed differential cascode voltage switch logic

A new form of DCVS logic, that is self-timed in nature and reduces the overhead of the hand-shaking circuitry has been developed. In comparison with conventional self-timed DCVS, such as EDCL or STDDCVSL, the new data-driven self-timed DCVSL [DSDCVSL] has the advantage of reduced area and smaller delays. It retains the benefits of dual-rail logic and self-timing. The key to efficient functioning of the new scheme lies in the way the completion signal is generated from the output data. This scheme is most applicable to practical circuits where the inputs to a stage arrive from several modules. This would require a proper integration of the completion signals generated by each module into a single signal that can be used to control the gate in question. DSDCVSL performs this integration efficiently