Level converters with high immunity to power-supply bouncing for high-speed sub-1-V LSIs

Author

Kanno, Y. ; Mizuno, H. ; Tanaka, K. ; Watanabe, Toshio

Author_Institution

Central Res. Lab., Hitachi Ltd., Tokyo, Japan

fYear

2000

fDate

15-17 June 2000

Firstpage

202

Lastpage

203

Abstract

We have developed a pump-hopping level-up converter and a differential-input, level-down converter that, enable level conversion for I/O interfacing in sub-1-V LSIs. The level-up converter transforms signals of 0.64 V to 3.6 V within 5 ns with a 0.14-/spl mu/m CMOS technology. The differential input level down converter enables stable operation even at VDD of 0.5 V. These proposed level converters also provide the immunity against power-supply bouncing, which is essential for low-voltage and high-speed LSIs.

Keywords

CMOS digital integrated circuits; Converters; High-speed integrated circuits; Large scale integration; Low-power electronics; VLSI; 0.14 micron; 0.64 to 3.6 V; CMOS technology; I/O interfacing; differential-input level-down converter; high-speed LSI circuits; level converters; low-voltage LSI circuits; power-supply bouncing immunity; pump-hopping level-up converter; stable operation; CMOS technology; Digital signal processing; Laboratories; Large scale integration; Logic; MOSFETs; Noise figure; Noise level; Variable structure systems; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Circuits, 2000. Digest of Technical Papers. 2000 Symposium on

Conference_Location

Honolulu, HI, USA

Print_ISBN

0-7803-6309-4

Type

conf

DOI

10.1109/VLSIC.2000.852890

Filename

852890