Author :
Hamioud, K. ; Arnal, V. ; Farcy, A. ; Jousseaume, V. ; Zenasni, A. ; Gourhant, O. ; Icard, B. ; Pradelles, J. ; Manakli, S. ; Brun, Ph ; Imbert, G. ; Jayet, C. ; Assous, M. ; Maitrejean, S. ; Vilmay, M. ; Galpin, D. ; Monget, C. ; Guillan, J. ; Chhun, S.
Abstract :
A 32 nm node BEOL demonstrator using trench first hard mask (TFHM) architecture is realized. The dual damascene process is performed with ELK dielectric at line and via level and with an adapted metallization in order to meet ITRS specifications. ELK k=2.3 & k=2.2 are studied in a TFHM architecture in order to prove its extendibility to ELK dielectric materials.
Keywords :
dielectric materials; electron beam lithography; integrated circuit interconnections; semiconductor device metallisation; BEOL interconnect-extendibility; TFHM scalability; dielectric material; size 32 nm; trench first hard mask architecture; CMOS technology; Capacitance; Delay; Dielectric constant; Dielectric materials; Electronic mail; Energy consumption; Lithography; Metallization; Scalability;
