Title :
Soft breakdown free atomic-layer-deposited silicon-nitride/SiO/sub 2/ stack gate dielectrics
Author :
Nakajima, A. ; Khosru, Q.D.M. ; Yoshirnoto, T. ; Kidera, T. ; Yokoyama, S.
Author_Institution :
Res. Center for Nanodevices & Syst., Hiroshima Univ., Japan
Abstract :
An extremely-thin (0.3-0.4 nm) silicon nitride layer has been deposited on thermally grown SiO/sub 2/ by an atomic-layer-deposition (ALD) technique. The boron penetration through the stack gate dielectrics has been dramatically suppressed and the reliability has been significantly improved. An exciting feature of no soft breakdown (SBD) events is observed in ramped voltage stressing and time-dependent dielectric breakdown (TDDB) characteristics. A model has been proposed, which consistently explains the no-SBD phenomena in ALD-silicon-nitride/SiO/sub 2/ stack gate dielectrics as well as the SBD events in conventional SiO/sub 2/ dielectrics.
Keywords :
dielectric thin films; electric breakdown; silicon compounds; vacuum deposited coatings; Si/sub 3/N/sub 4/-SiO/sub 2/:B; atomic layer deposition; boron penetration; ramped voltage stress; reliability; silicon nitride/SiO/sub 2/ stack gate dielectric; soft breakdown; time-dependent dielectric breakdown; Atomic layer deposition; Boron; Breakdown voltage; CMOS technology; Dielectric breakdown; Dielectric substrates; Electric breakdown; Nitrogen; Silicon; Thermal degradation;
Conference_Titel :
Electron Devices Meeting, 2001. IEDM '01. Technical Digest. International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-7050-3
DOI :
10.1109/IEDM.2001.979450
