• DocumentCode
    2164672
  • Title

    Adaptive routing for a bus-based multiprocessor

  • Author

    Fazio, V.J.

  • Author_Institution
    Dept. of Comput. Sci., Monash Univ., Clayton, Vic., Australia
  • fYear
    1997
  • fDate
    10-12 Dec 1997
  • Firstpage
    37
  • Lastpage
    50
  • Abstract
    This paper describes and compares an implementation of an unusual hot-spot-resistant adaptive routing architecture. This paper evaluates the performance of the architecture
  • Keywords
    multiprocessing systems; performance evaluation; adaptive routing; bus-based multiprocessor; hot-spot-resistant adaptive routing architecture; performance; Australia; Computer architecture; Computer science; Large-scale systems; Network topology; Random access memory; Reduced instruction set computing; Routing; System recovery; Wires;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Algorithms and Architectures for Parallel Processing, 1997. ICAPP 97., 1997 3rd International Conference on
  • Conference_Location
    Melbourne, Vic.
  • Print_ISBN
    0-7803-4229-1
  • Type

    conf

  • DOI
    10.1109/ICAPP.1997.651478
  • Filename
    651478
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2164672