DocumentCode
2165125
Title
Miss rate prediction across all program inputs
Author
Zhong, Yutao ; Dropsho, Steven G. ; Ding, Chen
Author_Institution
Dept. of Comput. Sci., Rochester Univ., NY, USA
fYear
2003
fDate
27 Sept.-1 Oct. 2003
Firstpage
79
Lastpage
90
Abstract
Improving cache performance requires understanding cache behavior. However, measuring cache performance for one or two data input sets provides little insight into how cache behavior varies across all data input sets. We use our recently published locality analysis to generate a parameterized model of program cache behavior. Given a cache size and associativity, this model predicts the miss rate for arbitrary data input set sizes. This model also identifies critical data input sizes where cache behavior exhibits marked changes. Experiments show this technique is within 2% of the hit rate for set associative caches on a set of integer and floating-point programs.
Keywords
cache storage; content-addressable storage; cache miss rate prediction; cache performance; data input sets; floating-point program; locality analysis; parameterized model; program cache behavior; set associative cache; Computer science; Flow graphs; Particle measurements; Pattern analysis; Pattern matching; Performance analysis; Predictive models; Runtime; Sampling methods; Space exploration;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel Architectures and Compilation Techniques, 2003. PACT 2003. Proceedings. 12th International Conference on
ISSN
1089-795X
Print_ISBN
0-7695-2021-9
Type
conf
DOI
10.1109/PACT.2003.1238004
Filename
1238004
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