DocumentCode
2165412
Title
The Embedded Genetic Allocator-a system to automatically optimize the use of memory resources in high performance, scalable computing systems
Author
Cousins, David ; Loomis, Jackson ; Roeber, Fred ; Schoeppner, Pamela ; Tobin, Anne-Elise
Author_Institution
BBN Technol., Middletown, RI, USA
Volume
3
fYear
1998
fDate
11-14 Oct 1998
Firstpage
2166
Abstract
Describes an approach to the problem of optimizing memory resource use in high-performance scalable computing systems. The approach is automatic and applicable to a wide variety of system architectures. It consists of a hybrid genetic algorithm optimizer (the Embedded Genetic Allocator or EGA), coupled with a high-precision software performance monitoring system. EGA requires no programmer knowledge of the underlying non-uniform memory access (NUMA) architecture of the target hardware; the programmer simply specifies the data buffers to be allocated and requires that certain groups of buffers share the same performance quality. EGA minimizes the execution time of time-critical portions of the target system by allocating target program data buffers to various memory banks in the NUMA architecture. These trial allocations are loaded and evaluated directly on the target hardware. Measurements of process execution time are derived from synchronized event logging of multiple processors performed by BBN TraceMakerTM . The timing data provides the information for an optimizer cost function which the genetic algorithm uses when selecting from amongst competing allocations. Thus, EGA automates the trial-and-error method of hand optimization. We have demonstrated EGA performing memory allocation optimizations on a typical VME-based multiprocessor DSP system and completed a set of optimization experiments. The results demonstrate that EGA can be used to optimize the memory allocation on a DSP with real-world code, and that the resulting optimizations can rival those generated manually by a skilled programmer
Keywords
buffer storage; digital signal processing chips; embedded systems; genetic algorithms; memory architecture; multiprocessing systems; resource allocation; software performance evaluation; storage allocation; system monitoring; BBN TraceMaker; EGA; Embedded Genetic Allocator; NUMA architecture; VME-based multiprocessor DSP system; data buffer allocation; digital signal processor; execution time minimization; high-performance scalable computing systems; high-precision software performance monitoring system; hybrid genetic algorithm optimizer; memory banks; memory resource use optimization; nonuniform memory access; optimizer cost function; performance quality; process execution time measurement; synchronized event logging; system architectures; time-critical portions; trial allocations; Computer architecture; Computer buffers; Digital signal processing; Genetic algorithms; Hardware; Memory architecture; Monitoring; Programming profession; Software performance; Time factors;
fLanguage
English
Publisher
ieee
Conference_Titel
Systems, Man, and Cybernetics, 1998. 1998 IEEE International Conference on
Conference_Location
San Diego, CA
ISSN
1062-922X
Print_ISBN
0-7803-4778-1
Type
conf
DOI
10.1109/ICSMC.1998.724976
Filename
724976
Link To Document