A 2GHz Delta-Sigma Modulator implemented in InP HBT technology

Author

Hincelin, Guillaume

Author_Institution

CSIRO Telecommunications and Industrial Physics, P O Box 76, Epping, NSW 1710 Australia. Tel: (61) 2 9372 4378 Fax: (61) 2 9372 4488, Guillaume.Hincelin@tip.csiro.au

fYear

2001

fDate

24-26 Sept. 2001

Firstpage

1

Lastpage

4

Abstract

A first-order Delta-Sigma (Â¿Â¿) modulator has been fabricated using a 70GHz (fT) AlInAs/GaInAs-InP HBT technology. At a sampling rate of 2GHz, it converts a 50MHz signal with a maximum signal-to-noise ratio (SNRmax) of 19dB and a dynamic range (DR) of 25dB, equivalent to 3.9DRbits. With a 10MHz signal, 36.5dB DR (5.8DRbits) and 30.8dB SNRmax are achieved. The modulator has been designed in a fully differential architecture, and dissipates 330mW from a Â¿5V power supply. This paper presents the performance of a first-order, continuous-time, low-pass Â¿Â¿ modulator. To date only a few results have been reported for first-order Â¿Â¿ modulator implemented in a III-V technology. A first-order architecture represents a fundamental first step in the design of higher order modulator offering better performance.

Keywords

Clocks; Delta modulation; Digital modulation; Digital signal processing; Frequency; Heterojunction bipolar transistors; Indium phosphide; Sampling methods; Signal processing; Signal to noise ratio;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Conference, 2001. 31st European

Conference_Location

London, England

Type

conf

DOI

10.1109/EUMA.2001.339138

Filename

4140206