Dynamic floating body control SOI CMOS circuits for power managed multimedia ULSIs

Author

Morishita, Fukashi ; Tsukude, Masaki ; Arimoto, Kazutami

Author_Institution

ULSI Lab., Mitsubishi Electr. Corp., Japan

fYear

1997

fDate

5-8 May 1997

Firstpage

263

Lastpage

266

Abstract

A novel body potential controlling technique for floating SOI CMOS circuits is proposed and verified. High speed operation is realized with a small chip size by using body-floating SOI transistors. By using this technique, the threshold voltage of the body-floating transistors is varied transitionally. Therefore, the standby current of SOI CMOS logic is reduced less than 1/10th compared to the non-control operation of the body potential and operates at high speed during the active period. There is no access penalty for the recovery operation from the standby mode. This technique supports sub 1 V operation, which is required for future battery operated devices with wide range covering

Keywords

CMOS logic circuits; ULSI; multimedia systems; silicon-on-insulator; 1 V; SOI CMOS logic; Si; battery operated devices; body potential controlling technique; body-floating SOI transistors; dynamic floating body control circuits; floating SOI CMOS circuits; high speed operation; power managed multimedia ULSIs; standby current reduction; threshold voltage variation; Body regions; CMOS logic circuits; CMOS technology; Circuit testing; Energy management; Personal digital assistants; Ring oscillators; Silicon on insulator technology; Threshold voltage; Ultra large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 1997., Proceedings of the IEEE 1997

Conference_Location

Santa Clara, CA

Print_ISBN

0-7803-3669-0

Type

conf

DOI

10.1109/CICC.1997.606626

Filename

606626