Design and test of mixed-signal VLSI

Mixed-signal VLSI circuits are becoming increasingly popular in the electronic industry due to their high speed, improved output drive capability, memory optimization, and submicron geometry. However, two major factors impede its full acceptance by the design community and subsequent large-scale incorporation in today´s product. The first factor is the lack of sophisticated mixed-signal analysis tools specifically designed for this purpose. The second factor is the problem of testing such devices. This paper describes a strategy to design and test such VLSI circuits. It solves the testing problems for mixed-signal VLSI devices at their roots by using mixed-mode simulation results and design for testability constraints early in the design phase. The fundamental issue here is how to faithfully represent the interactions between the analog and digital devices at their interfaces in simulation. Simulation environment, rules for analog-digital signal conversion at their interface, timing delay and synchronization, as well as error handling are described. In particular, various A/D and D/A conversion models are analyzed by comparing simulation results with responses from real devices in order to validate proposed models. By using simulation results thus generated, test stimuli can be easily derived which facilitate fault detection and localization. Testability enhancements can also be suggested during the design verification phase of the product