Title :
Modeling and Simulation of Circuit Aging in Scaled CMOS Design
Author_Institution :
Arizona State Univ., Phoenix, AZ
Abstract :
The document was not made available for publication as part of the conference proceedings.
Keywords :
CMOS integrated circuits; ageing; integrated circuit design; integrated circuit modelling; semiconductor process modelling; circuit aging; circuit modeling; circuit simulation; scaled CMOS design; Aging; Circuit simulation; Circuit testing; Semiconductor device modeling;
Conference_Titel :
On-Line Testing Symposium, 2008. IOLTS '08. 14th IEEE International
Conference_Location :
Rhodes
Print_ISBN :
978-0-7695-3264-6
DOI :
10.1109/IOLTS.2008.65
