Defective wafer detection using multiple classifiers

In a semiconductor factory, Parametric Tests (PT) are performed to check if a particular product is within a certain predefined specifications, and to detect possible process drifts as early as possible. In addition, PT results are used to decide based on Statistical Process Control (SPC) charts whether to accept or to reject a wafer¹. These methods lead to stop many lots unnecessarily. In this paper, we introduce an automatic wafer classification approach based on combining learning algorithms to improve the detection rate of defective wafers. This procedure was successfully validated at PT data provided by STMicroelectronics - Rousset fab. Results show significant reduction of the number of lots stopped unnecessarily.