DocumentCode :
2168141
Title :
Efficient systolic implementation of fixed-point state-space digital filter
Author :
Tawfik, A. ; El-Guibaly, F. ; Agathoklis, P.
Author_Institution :
Dept. of Electr. & Comput. Eng., Victoria Univ., BC, Canada
fYear :
1993
fDate :
14-17 Sep 1993
Firstpage :
39
Abstract :
We present an efficient systolic implementation for N-order state-space IIR digital filters. The proposed systolic architecture provides an excellent performance in terms of area and speed. A comparison between the suggested systolic architecture and two other conventional architectures is also presented
Keywords :
digital arithmetic; digital filters; state-space methods; systolic arrays; IIR digital filters; area; fixed-point state-space digital filter; performance; recursive fixed point digital filters; speed; systolic architecture; Computer architecture; Concurrent computing; Digital filters; Finite wordlength effects; Hardware; High performance computing; Signal mapping; Signal processing algorithms; State feedback; Systolic arrays;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical and Computer Engineering, 1993. Canadian Conference on
Conference_Location :
Vancouver, BC
Print_ISBN :
0-7803-2416-1
Type :
conf
DOI :
10.1109/CCECE.1993.332241
Filename :
332241
Link To Document :
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