Title :
Cu contamination induced degradation mechanism of embedded flash cell
Author :
Isobe, K. ; Kanda, M. ; Murakami, T. ; Totsuka, K. ; Moriuchi, M. ; Miyoshi, T. ; Yamada, S. ; Noguchi, T.
Author_Institution :
Syst. LSI Div., Toshiba Corp., Yokohama, Japan
Abstract :
Flash memory cell characteristics degradation modes induced by copper (Cu) contamination have been investigated in detail. In addition, process integration for embedded flash memory within logic devices using Cu interconnection has been established. Due to Cu contamination, after stress induced by channel hot electron injection, interface-states located at the drain overlap region are accelerated. This leads to degradation of programmed cell threshold voltage (Vt) lowering. After Fowler-Nordheim (F-N) current stress, generation of electron trap sites in tunnel oxide is enhanced by the Cu, resulting in degradation of gate stress characteristics and data retention characteristics. However, with F-N stress, the increment of the number of trapped electrons in the tunnel oxide is not severe for embedded NOR flash applications used within up to 10/sup 4/ write/erase (W/E) cycles. As a result, the erased cell Vt rise is almost the same as that of a reference sample.
Keywords :
CMOS memory circuits; copper; electron traps; embedded systems; flash memories; hot carriers; integrated circuit interconnections; integrated circuit reliability; interface states; surface contamination; tunnelling; CMOS technology; Cu contamination induced degradation mechanism; Cu interconnection; Fowler-Nordheim current stress; channel hot electron injection; data retention characteristics degradation; drain overlap region; electron trap sites; embedded NOR flash application; embedded flash cell; flash memory cell characteristics degradation modes; gate stress characteristics degradation; interface-states; logic device integration; process integration; programmed cell threshold voltage lowering; trapped electrons; tunnel oxide; Acceleration; Channel hot electron injection; Contamination; Copper; Degradation; Electron traps; Flash memory; Flash memory cells; Logic devices; Stress;
Conference_Titel :
Electron Devices Meeting, 2001. IEDM '01. Technical Digest. International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-7050-3
DOI :
10.1109/IEDM.2001.979612