Title :
A high-linearity low-voltage all-MOSFET delta-sigma modulator
Author :
Huang, Yunteng ; Temes, Gabor C. ; Yoshizawa, Hirokazu
Author_Institution :
Oregon State Univ., Corvallis, OR, USA
Abstract :
The implementation of a second-order switched-capacitor delta-sigma modulator is described. The modulator uses MOSFETs in their accumulation region as capacitors, with the input branches linearized using series compensation. It utilizes only basic digital CMOS technology and was fabricated in a 1.2 μm process. The chip area of the modulator is about 1 mm2. Measured results show that the modulator has a 94 dB peak S/THD, a 96 dB peak S/N and an 86 dB peak S/THD+N for a 6 kHz bandwidth with 5.4 mW power dissipation using a 3 V power supply and a 3.6 V capacitor bias voltage
Keywords :
CMOS integrated circuits; compensation; modulators; sigma-delta modulation; switched capacitor networks; 1.2 micron; 3 V; 3.6 V; 5.4 mW; 6 kHz; 96 dB; LV all-MOSFET delta-sigma modulator; accumulation region; all-MOSFET delta-sigma modulator; digital CMOS technolog; high-linearity delta-sigma modulator; low voltage operation; second-order SC delta-sigma modulator; series compensation; switched-capacitor delta-sigma modulator; Bandwidth; CMOS process; CMOS technology; Capacitors; Delta modulation; MOSFETs; Power dissipation; Power measurement; Power supplies; Semiconductor device measurement;
Conference_Titel :
Custom Integrated Circuits Conference, 1997., Proceedings of the IEEE 1997
Conference_Location :
Santa Clara, CA
Print_ISBN :
0-7803-3669-0
DOI :
10.1109/CICC.1997.606632
