SON (Silicon on Nothing) MOSFET using ESS (Empty Space in Silicon) technique for SoC applications

Author

Sato, T. ; Nii, H. ; Hatano, M. ; Takenaka, K. ; Hayashi, H. ; Ishigo, K. ; Hirano, T. ; Ida, K. ; Aoki, N. ; Ohguto, T. ; Ino, K. ; Mizushima, I. ; Tsunashima, T.

Author_Institution

Process & Manuf. Eng. Center, Toshiba Corp., Yokohama, Japan

fYear

2001

fDate

2-5 Dec. 2001

Abstract

SON (Silicon on Nothing) MOSFET was successfully fabricated for the first time by using ESS (Empty Space in Silicon) technique as an alternative of SOI-MOSFET. Advantage of SON structure was experimentally demonstrated. SON structure using ESS technique is appropriate for System on a Chip (SoC) applications, such as embedded trench DRAMs and digital-analog mixed devices, due to the merit that SON structure can be fabricated partially on bulk substrate.

Keywords

DRAM chips; MOSFET; integrated circuit technology; mixed analogue-digital integrated circuits; semiconductor technology; ESS; SON MOSFET; SON structure; Si; SoC applications; System on a Chip; bulk substrate; digital-analog mixed devices; embedded trench DRAMs; empty space in Si; Annealing; Electronic switching systems; Fabrication; Hydrogen; Lattices; MOSFET circuits; Parasitic capacitance; Shape measurement; Silicon; System-on-a-chip;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 2001. IEDM '01. Technical Digest. International

Conference_Location

Washington, DC, USA

Print_ISBN

0-7803-7050-3

Type

conf

DOI

10.1109/IEDM.2001.979637

Filename

979637