• DocumentCode
    2169110
  • Title

    Guidelines for testing WSI sequential arrays

  • Author

    Buonanno, G. ; Sciuto, D. ; Shen, Y.-N.

  • Author_Institution
    Dipartimento di Elettronica, Politecnico di Milano, Italy
  • fYear
    1991
  • fDate
    29-31 Jan 1991
  • Firstpage
    300
  • Lastpage
    306
  • Abstract
    New results on generating a functional test procedure for linear arrays composed of sequential cells are presented. The sequential cell is modeled as a finite state machine and the testing process is characterized by the definition of a test sequence for each transition of the finite state machine, by means of the unique input/output sequence technique. The two sets of conditions that are defined (for controllability and observability) allow testing of a one-dimensional sequential array in linear time. The methodology presented has been applied to a number of different examples of sequential linear arrays (convolvers, complex multipliers, and FFT arrays), and fault coverage obtained by considering the single stuck-at fault model was evaluated
  • Keywords
    VLSI; digital integrated circuits; integrated circuit testing; FFT arrays; WSI sequential arrays; complex multipliers; controllability; convolvers; fault coverage; finite state machine; functional test procedure; linear arrays; linear time; observability; one-dimensional sequential array; sequential cells; sequential linear arrays; single stuck-at fault model; test guidelines; Array signal processing; Automata; Computer industry; Computer science; Guidelines; Logic testing; Manufacturing processes; Observability; Pins; Sequential analysis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Wafer Scale Integration, 1991. Proceedings., [3rd] International Conference on
  • Conference_Location
    San Francisco, CA
  • Print_ISBN
    0-8186-9126-3
  • Type

    conf

  • DOI
    10.1109/ICWSI.1991.151731
  • Filename
    151731