Research on the data collection in chip reverse analysis

Reverse analysis of chip is developed basing on the need of discovering design defection and eliminating hardware security vulnerability, automatic testing and diagnosis of electronic equipments. Nowadays it is the main direction of information security study as well. The data collection which is the key part of the chip reverse analysis is studied in this paper. The completeness of data collection determines whether the reverse analysis result is correct. To collecting the complete data set, a measurable sequential logic circuit model is proposed based on the external characteristics analysis of combinational and sequential logic circuit and an abstract description of data collection algorithm is given.