Title :
Bottom Nitridation Engineering of Multi-Nitridation ONO Interpoly Dielectric for Highly Reliable and High Performance NAND Flash Memory
Author :
Liu, C.H. ; Lin, Y.M. ; Yin, D.Y. ; Tseng, G.H. ; Liaw, H.W. ; Wei, H.C. ; Chen, S.H. ; Chao, C.M. ; Hwang, H.P. ; Pittikoun, S. ; Aritome, S.
Author_Institution :
Powerchip Semicond. Corp., Hsinchu
Abstract :
The various methods of multi-nitridation ONO to improve NAND flash memory have been demonstrated in this paper. Excellent cell performance and reliability are obtained compared to convention ONO: (1) 1.9 V program voltage reduction owing to 23 A EOT (equivalant oxide thickness) reduction (2) More than 20% tighter cell Vt distribution width and 30% narrower Vth shift after 10 K cycling can be achieved by supressing ONO bird´s beak encroachment of gate re-oxidation by floating gate (FG)/top oxide nitridation. MN-ONO is a promising technology for high density NAND flash beyond 40 nm generation.
Keywords :
NAND circuits; dielectric materials; flash memories; nitridation; oxidation; semiconductor device reliability; EOT reduction; bottom nitridation engineering; equivalant oxide thickness; floating gate; gate reoxidation; high-performance NAND flash memory; multinitridation ONO interpoly dielectrics; reliability; top oxide nitridation; voltage reduction; Bonding; Dielectric substrates; Electron emission; Nitrogen; Oxidation; Plasma density; Plasma devices; Power engineering and energy; Reliability engineering; Voltage;
Conference_Titel :
Memory Workshop, 2009. IMW '09. IEEE International
Conference_Location :
Monterey, CA
Print_ISBN :
978-1-4244-3762-7
DOI :
10.1109/IMW.2009.5090583
