DocumentCode :
2169743
Title :
Single chip test and burn-in
Author :
Forster, J.
Author_Institution :
Texas Instrum. Inc., USA
fYear :
2000
fDate :
2000
Firstpage :
810
Lastpage :
814
Abstract :
The last decade has seen the explosion of advanced packaging technologies. Excitement and interest in smaller and lighter consumer products has driven the need to reduce package size. As the smallest package is no package, bare die have been proposed as the-ultimate solution. Bare die have been available for many years driven by the need for small size in products for military and aerospace markets. These markets, while significant, have not had the cost drivers associated with the consumer product markets. Also, the tools and techniques for testing and burn-in of bare die were considered expensive perhaps acceptable for the mission critical military and aerospace applications but not in the cost sensitive products that are being demanded by consumers. The growth of the-laptop and hand-held computers in the mid-nineties resulted in several OEM´s evaluating the decision to sell bare die. This stimulated the test socket and burn-in fixture industry to develop a number of techniques for the testing and burn-in of bare die. While the initial costs were high it was shown that the lifetime cost of the techniques could be comparable to die cost of the package. However, end users have maintained that the cost of a bare die should be less than the equivalent packaged device. This is extremely difficult to achieve for ICs that have low cost packages and low margins to begin with (e.g., DRAM), especially if the bare die user requires low volumes of product. The net result was that even though a number of test and burn-in solutions for bare die conditioning were becoming available, the general immaturity of the infrastructure made the decision to implement a bare die solution for applications a risky proposition. Many OEMs opted for a less risky solution, the emerging chip scale package. However, the increasing demand for smaller form factor and multi-chip packages in consumer markets, coupled with lower costs due to maturing of the technologies, is stimulating suppliers to re-evaluate the options for test and burn-in of bare die products
Keywords :
integrated circuit packaging; integrated circuit testing; IC packaging; bare die; burn-in; single chip testing; Aerospace industry; Aerospace testing; Application software; Consumer products; Costs; Explosions; Handheld computers; Military computing; Mission critical systems; Packaging;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Components & Technology Conference, 2000. 2000 Proceedings. 50th
Conference_Location :
Las Vegas, NV
Print_ISBN :
0-7803-5908-9
Type :
conf
DOI :
10.1109/ECTC.2000.853254
Filename :
853254
Link To Document :
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