DocumentCode
2170395
Title
Efficient Implementation of AES Algorithm Immune to DPA Attack
Author
Amaar, A. ; Ashour, I. ; Shiple, M.
Author_Institution
Nat. Telecommun. Inst., Cairo, Egypt
fYear
2012
fDate
28-30 March 2012
Firstpage
396
Lastpage
401
Abstract
This paper presents a highly efficient AES algorithm resistant to differential power analysis (DPA). This paper conducts a simulation based correlation power analysis (CPA) attack on AES implementation with different structures. The proposed idea does not affect the working frequency and does not alter the algorithm core architecture. A minimal overhead hardware is used to manage the dataflow of plaintext and noise.
Keywords
cryptography; field programmable gate arrays; AES algorithm; DPA attack; advanced encryption standard; correlation power analysis attack; differential power analysis; minimal overhead hardware; plaintext dataflow; Algorithm design and analysis; Correlation; Mathematical model; Noise; Power demand; Registers; Standards; Correlation power analysis (CPA);
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Modelling and Simulation (UKSim), 2012 UKSim 14th International Conference on
Conference_Location
Cambridge
Print_ISBN
978-1-4673-1366-7
Type
conf
DOI
10.1109/UKSim.2012.110
Filename
6205480
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