Title :
Layout driven technology mapping
Author :
Pedram, Massoud ; Bhat, Narasimha
Author_Institution :
University of California
Keywords :
Circuit synthesis; Delay; Integrated circuit interconnections; Integrated circuit technology; Libraries; Logic programming; Network synthesis; Permission; Timing; Wiring;
Conference_Titel :
Design Automation Conference, 1991. 28th ACM/IEEE
Conference_Location :
IEEE
Print_ISBN :
0-89791-395-7
