• DocumentCode
    2171069
  • Title

    A formal approach to design space exploration of protocol converters

  • Author

    Avnit, Karin ; Sowmya, Arcot

  • Author_Institution
    Sch. of Comput. Sci. & Eng., Univ. of New South Wales, Sydney, NSW
  • fYear
    2009
  • fDate
    20-24 April 2009
  • Firstpage
    129
  • Lastpage
    134
  • Abstract
    In the field of chip design, hardware module reuse is a standard solution to the increasing complexity of chip architecture and the pressures to reduce time to market. In the absence of a single module interface standard, integration of pre-designed modules often requires the use of protocol converters. For an arbitrary pair of incompatible protocols it is likely that there exist more than one possible converter. However, existing approaches to automatic synthesis of protocol converters either produce a single suggested converter or provide a general nondeterministic solution, out of which a designer is required to extract a deterministic converter. In this work we present a novel approach for design space exploration of FSM based protocol converters. We present algorithms for extraction of minimal converters for a given pair of incompatible protocols. We demonstrate the process through a simple example, and report on results of experiments with converters for commercial protocols AMBA ASB, APB and the open core protocol (OCP). The experiments show a reduction in the number of states in the converter of as much as 62% (with an average reduction of 42%) and a reduction in the number of transitions of as much as 85% (with an average reduction of 61%), demonstrating the benefits of design space exploration.
  • Keywords
    microprocessor chips; protocols; AMBA ASB; APB; FSM; chip architecture; chip design; design space exploration; formal approach; hardware module reuse; module interface standard; open core protocol; protocol converters; Australia; Buffer storage; Communication standards; Computer science; Design engineering; Design methodology; Hardware; Protocols; Space exploration; Time to market;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE '09.
  • Conference_Location
    Nice
  • ISSN
    1530-1591
  • Print_ISBN
    978-1-4244-3781-8
  • Type

    conf

  • DOI
    10.1109/DATE.2009.5090645
  • Filename
    5090645