Title :
Enhanced controllability for IDDQ test sets using partial scan
Author :
Chakraborty, Tapan J. ; Bhawmik, Sudipta ; Bencivenga, Robert ; Lin, C.J.
Author_Institution :
AT&T Bell Labs, ERC
Keywords :
Built-in self-test; CMOS technology; Circuit faults; Circuit testing; Controllability; Logic testing; Permission; Sequential analysis; Sequential circuits; Test pattern generators;
Conference_Titel :
Design Automation Conference, 1991. 28th ACM/IEEE
Conference_Location :
IEEE
Print_ISBN :
0-89791-395-7
