• DocumentCode
    2171563
  • Title

    A general multi-layer area router

  • Author

    Guruswamy, M. ; Wong, D.F.

  • Author_Institution
    The University of Texas at Austin
  • fYear
    1991
  • fDate
    21-21 June 1991
  • Firstpage
    335
  • Lastpage
    340
  • Keywords
    Circuit optimization; Circuit synthesis; Clocks; Compaction; Drives; Permission; Pins; Routing; Shape; Wiring;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 1991. 28th ACM/IEEE
  • Conference_Location
    IEEE
  • Print_ISBN
    0-89791-395-7
  • Type

    conf

  • Filename
    979738