Title :
A unified approach for the synthesis of self-testable finite state machines
Author :
Eschermann, Bernhard ; Wunderlich, Hans-Joachim
Author_Institution :
Universitat Karlsruhe
Keywords :
Automata; Automatic testing; Built-in self-test; Circuit faults; Circuit synthesis; Circuit testing; Hardware; Permission; Registers; Sequential circuits;
Conference_Titel :
Design Automation Conference, 1991. 28th ACM/IEEE
Conference_Location :
IEEE
Print_ISBN :
0-89791-395-7
