Effects of Diameter of P-channel Nanowire Transistors on Nanowire-CMOS Inverter Characteristics

This paper highlights an effort to study the characteristics of silicon CMOS nanowire transistor and the effect of cross-sectional area of PMOS transistor on silicon nanowire-CMOS inverter characteristics. In this study generated MATLAB code is used together with NanoHub MuGFET simulation tool to produce the characteristics of silicon nanowire transistors and nanowire CMOS inverter. Nanowire CMOS inverter was simulated and investigated using MuGFET simulation tool and designed MATLAB code to calculate the output and current characteristics of inverter. The best transfer characteristics for inflection voltage (near to half input voltage) was obtained by increasing the diameter of nanowire of P-channel transistor because of lower mobility of carriers (holes) in P-channel nanowires compared to the carriers (electrons) in N-channel nanowire transistor.