DocumentCode :
2171845
Title :
Architecture and scale issues in static schedules
Author :
Shepard, Terry ; Burke, Michael
Author_Institution :
R. Mil. Coll. of Canada, Kingston, Ont., Canada
fYear :
1993
fDate :
14-17 Sep 1993
Firstpage :
725
Abstract :
Scheduling guarantees are essential in many real-time embedded computer systems. They can only be achieved by performing analysis of scheduling feasibility prior to run-time. This paper examines some issues related to this problem in the context of hardware architectures that are more complex than a single bus linking several processors. It raises questions about how well existing static scheduling and schedulability analysis techniques scale up to the larger systems that are likely to be in use in the future
Keywords :
computer architecture; computer networks; multiprocessing systems; real-time systems; scheduling; hardware architectures; multiprocessor systems; real-time embedded computer systems; scale; schedulability analysis; scheduling; static schedules; Computer architecture; Dynamic scheduling; Embedded system; Hardware; Military computing; Processor scheduling; Real time systems; Runtime; Scheduling algorithm; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical and Computer Engineering, 1993. Canadian Conference on
Conference_Location :
Vancouver, BC
Print_ISBN :
0-7803-2416-1
Type :
conf
DOI :
10.1109/CCECE.1993.332399
Filename :
332399
Link To Document :
بازگشت