Title :
A probabilitistic testability measure for delay faults
Author :
Wu, Wen Ching ; Lee, Chung Len
Author_Institution :
National Chiao Tung Univ.
Keywords :
Circuit faults; Circuit simulation; Circuit testing; Combinational circuits; Delay; Logic testing; Permission; Robustness; Sequential analysis; Sequential circuits;
Conference_Titel :
Design Automation Conference, 1991. 28th ACM/IEEE
Conference_Location :
IEEE
Print_ISBN :
0-89791-395-7