DocumentCode :
2172123
Title :
Incorporating graceful degradation into embedded system design
Author :
Glaß, Michael ; Lukasiewycz, Martin ; Haubelt, Christian ; Teich, Jürgen
Author_Institution :
Univ. of Erlangen-Nuremberg, Nuremberg
fYear :
2009
fDate :
20-24 April 2009
Firstpage :
320
Lastpage :
323
Abstract :
In this work, the focus is put on the behavior of a system in case a fault occurs that disables the system from executing its applications. Instead of executing a random subset of the applications depending on the fault, an approach is presented that optimizes the systems structure and behavior with respect to a possible graceful degradation. It includes a degradation-aware reliability analysis that guides the optimization of the resource allocation and function distribution, and provides data-structures for an efficient online degradation algorithm. Thus, the proposed methodology covers both, the design phase with a structural optimization and the online phase with a behavioral optimization of the system. A case study shows the effectiveness of the proposed approach.
Keywords :
data structures; embedded systems; fault tolerant computing; logic design; degradation-aware reliability analysis; embedded system design; function distribution; graceful degradation; resource allocation; Algorithm design and analysis; Boolean functions; Data structures; Degradation; Design optimization; Embedded system; Hardware; Reliability; Resource management; Space exploration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE '09.
Conference_Location :
Nice
ISSN :
1530-1591
Print_ISBN :
978-1-4244-3781-8
Type :
conf
DOI :
10.1109/DATE.2009.5090681
Filename :
5090681
Link To Document :
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