Title :
A bottom up approach for placement and compaction of standard modules in VLSI circuit
Author :
Sangwan, Deepak ; Verma, Shalini ; Kumar, Ravindra
Author_Institution :
DSG, CEERI, Pilani, India
Abstract :
A bottom up approach for floor planning using the method of composite block formation using Macro Modules is presented. The process involves a recursive technique of bounding rectangle formation after searching the solution space using various number of composite block elements. The algorithm is efficient enough to reduce the dead space in range of 85-99 % and much quicker i.e. from 10 to 100 times faster as compared to standard iterative approaches to carryout floor planning in Electronic Design Automation tools.
Keywords :
VLSI; compaction; electronic design automation; integrated circuit layout; VLSI circuit; bottom up approach; bounding rectangle formation; composite block elements; composite block formation; electronic design automation tools; floor planning; macro modules; standard module compaction; standard module placement; Benchmark testing; Binary trees; Floors; Genetic algorithms; Simulated annealing; Standards; Very large scale integration; Aspect ratio; Dead space; Electronic Design Automation; Non-slicing floor plan; Recursive technique; Slicing floor plan;
Conference_Titel :
Advanced Electronic Systems (ICAES), 2013 International Conference on
Conference_Location :
Pilani
Print_ISBN :
978-1-4799-1439-5
DOI :
10.1109/ICAES.2013.6659377
