DocumentCode :
2172308
Title :
Optimal ordering of analog integrated circuit tests to minimize test time
Author :
Huss, Scott D. ; Gyurcsik, Ronald S.
Author_Institution :
North Carolina State University
fYear :
1991
fDate :
21-21 June 1991
Firstpage :
494
Lastpage :
499
Keywords :
Analog integrated circuits; Circuit faults; Circuit testing; Electrical fault detection; Fault detection; Integrated circuit testing; Performance evaluation; Permission; Probability; Probes;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 1991. 28th ACM/IEEE
Conference_Location :
IEEE
Print_ISBN :
0-89791-395-7
Type :
conf
Filename :
979765
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2172308
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