High Performance Ultra Low-k (k=2.0/keff=2.4)/Cu Dual-Damascene Interconnect Technology with Self-Formed MnSixOy Barrier Layer for 32 nm-node

Author

Usui, T. ; Tsumura, K. ; Nasu, H. ; Hayashi, Y. ; Minamihaba, G. ; Toyoda, H. ; Sawada, H. ; Ito, S. ; Miyajima, H. ; Watanabe, K. ; Shimada, M. ; Kojima, A. ; Uozumi, Y. ; Shibata, H.

Author_Institution

SoC R&D Center, Toshiba Corp., Yokoham

fYear

2006

fDate

5-7 June 2006

Firstpage

216

Lastpage

218

Abstract

In order to realize the effective dielectric constant (k eff)=2.4 for 32 nm-node copper (Cu) dual-damascene (DD) interconnects, a spin-on-dielectric (SOD) SiOC (k=2.0) as the inter-level dielectric and plasma-induced damage restoration treatment were successfully demonstrated. It was obtained that good via resistance and stress-induced voiding (SiV) reliability. In addition, CoW-cap and thin SiC (k=3.5) and dual hard mask process using a metal layer was proposed to reduce the capacitance of dielectric diffusion barrier and protection layers in hybrid (PAr/SiOC) inter-layer dielectric (ILD) structure. As for the metallization, a self-formed MnSi_xO_y barrier technology was applied in hybrid ILD structure. Drastic reduction of via resistance and excellent electromigration and SiV performance were obtained for the first time in hybrid ILD structure

Keywords

cobalt compounds; copper; diffusion barriers; electromigration; integrated circuit interconnections; low-k dielectric thin films; manganese compounds; reliability; silicon compounds; 32 nm; CoW; MnSiO; SiC; SiOC; capacitance reduction; copper dual-damascene interconnects; dielectric diffusion barrier; electromigration; hybrid inter-layer dielectric structure; inter-level dielectric; metallization; plasma-induced damage restoration treatment; self-formed MnSi_xO_y barrier layer; spin-on-dielectric; stress-induced voiding reliability; ultra low-k dual-damascene interconnect technology; via resistance; Atherosclerosis; Capacitance; Copper; Dielectric materials; Electromigration; Indium tin oxide; Metallization; Protection; Research and development; Toy manufacturing industry;

fLanguage

English

Publisher

ieee

Conference_Titel

Interconnect Technology Conference, 2006 International

Conference_Location

Burlingame, CA

Print_ISBN

1-4244-0104-6

Type

conf

DOI

10.1109/IITC.2006.1648692

Filename

1648692