Design and Optimization of Real-Time Texture Analysis Using Sum and Difference Histograms Implemented on an FPGA

This work presents the adequacy of a dense texture analysis algorithm based on sum and difference histograms (SDHs) into a reconfigurable architecture. A deep analysis of the SDHs algorithm helps found a significant reduction in operations, size and access memory which consequently optimize resources, memory and latency time during the implementation. Furthermore, integer arithmetic operations used by SDHs are directly compatible with the FPGA making faster and efficient the implementation. Final architecture constructs 30 dense texture feature images of 640 × 480 pixels per second. Also a performance comparison among three different texture analysis architectures highlights a better trade off in performance, latency, logic elements and memory size of our system. The optimization and the resource saving make the proposed architecture an interesting choice to solve the problem of texture analysis in real time, quite used in artificial vision, autonomous navigation and medical applications.