DocumentCode
2172899
Title
High speed optimised reconfigurable architecture of fuzzy logic controller
Author
Saeed, M.A. ; Hasan, M. ; Ahmad, N.
Author_Institution
Dept. Of Space, Semicond. Lab., Mohali
fYear
2007
fDate
20-22 Dec. 2007
Firstpage
558
Lastpage
561
Abstract
This paper presents a reconfigurable fuzzy logic controller (FLC) with much less hardware than the existing controllers. Pipelining is used in the design to make the FLC fast for high speed real time applications. The FLC is reconfigurable in terms of membership function parameters for antecedent and consequent and fuzzy implication rules. The FLC is implemented in a field programmable gate array (FPGA) and operates at a frequency of 75 MHz.
Keywords
field programmable gate arrays; fuzzy control; pipeline processing; field programmable gate array; fuzzy implication rules; high speed optimised reconfigurable architecture; pipelining; reconfigurable fuzzy logic controller; Antecedent; Fuzzy logic controller; Membership function;
fLanguage
English
Publisher
iet
Conference_Titel
Information and Communication Technology in Electrical Sciences (ICTES 2007), 2007. ICTES. IET-UK International Conference on
Conference_Location
Tamil Nadu
ISSN
0537-9989
Type
conf
Filename
4735858
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