Min-sum unit with multi-normalized-factors for LPDC decoder

A min-sum unit with multi-normalized-factors which is used in LDPC decoder is proposed. This min-sum unit uses a multiplier instead of LUT, and this multiplier nearly has the same precision as the LUT. Synthesis results show that, if four normalized factors are needed, the equivalent gate count of the 5 bits multiplier is 27% less than the LUT, and the equivalent gate count of min-sum unit using this multiplier is 3% less than using the LUT. A fix-point LDPC decoding C-module of 1944 bits 802.11n LDPC codes is also designed and the simulation results show that the decoder using the proposed min-sum unit has a comparable decoding performance to the one using LUT in min-sum unit.