• DocumentCode
    2173517
  • Title

    A 3 nV/n√Hz, DC-precise, JFET operational amplifier

  • Author

    Wurcer, Scott

  • Author_Institution
    Analog Devices Semicond., Wilmington, MA, USA
  • fYear
    1989
  • fDate
    18-19 Sep 1989
  • Firstpage
    116
  • Lastpage
    119
  • Abstract
    An amplifier topology and design techniques that enable JFETs to achieve ultra-low-noise, high-DC-precision performance on a par with bipolar transistors, while retaining their inherently lower input current errors, are presented. The amplifier combines a voltage noise of 3 nV/&nthroot; Hz and a current noise of 5.4 fA/&nthroot; Hz, both at 1 kHz, with high DC precision: Vos<100 μV, dVos/dT<1 μV/°C, Aol >5×106, and common-mode rejection ratio ⩾100 dB. These results are achieved by a new trimming technique
  • Keywords
    compensation; differential amplifiers; electron device noise; junction gate field effect transistors; linear integrated circuits; monolithic integrated circuits; operational amplifiers; BIFET IC; CMRR; JFET input configuration; JFET operational amplifier; amplifier topology; common-mode rejection ratio; current noise; design techniques; frequency compensation; high-DC-precision performance; trimming technique; ultra-low-noise; voltage noise; Capacitance; Capacitors; Circuit noise; Doping; Frequency; Leakage current; Operational amplifiers; Temperature; Transconductance; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Bipolar Circuits and Technology Meeting, 1989., Proceedings of the 1989
  • Conference_Location
    Minneapolis, MN
  • Type

    conf

  • DOI
    10.1109/BIPOL.1989.69471
  • Filename
    69471
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2173517